The 74AHC138 and 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138 and ...
GRENOBLE, France--(BUSINESS WIRE)--Allegro DVT, the leading provider of video processing silicon IPs and video compliance streams, has announced that its D310 AV1 Decoder silicon IP now supports ...