Almost everyone knows that the bulk of DRAMs produced end up in desktop and laptop computers just like the one used to write this article. In fact, approximately 90% of all DRAMs produced are used in ...
We've spoken quite a lot about DDR memory in the last few months, but this is the first opportunity we've had to test the new technology for ourselves. With the falling prices of Athlons and memory, ...
These design guidelines provide the best practices for DDR and DDR2 SDRAM custom memory interface implementation in Stratix III and Stratix IV FPGAs. Figure 1 shows the design flow that is required ...
The fast-paced computer world shows the same scenario over and over again: What may be the latest thing today will be old news tomorrow. AMD’s 760 chipset, the first building block of the SocketA ...
Now-a-days, DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory) has become the most popular class of memory used in computers due to its high speed, burst access and pipeline feature ...
Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...
Intel unveils DDR chipset for Pentium 4News from E-InSiteAfter several months of anticipation, Intel has released a chipset that will allow its Pentium 4 processor to use double data rate (DDR) SDRAM ...
Hyundai Electronics Industries Co. Ltd. (HEI) today revealed that it has produced samples of 128Mbit double data rate (DDR) SDRAM using a 0.18-micron process technology. The 3G memory device meets the ...
Anybody Need Another DDR-Chipset? Today it finally happened. From now on Intel allows motherboard makers to couple the i845 chipset with DDR-memory. Of course this it not the way things are put ...
The Federal Trade Commission in a decision announced Monday substantially limited the size of royalties that memory chipmaker Rambus can charge for its DRAM technology. The commission's order sets a ...
This is a two-part article that focuses on the design guidelines and describes how to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. This ...
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