EDN

Every new design is an ESD test chip

The effect of low ESD immunity on a new product introduction can be both obvious and subtle. Manufacturing and test facilities adhere to ANSI standards for ESD protection and handling of chips based ...
Semiconductor Engineering

Efficient ESD Verification For 2.5/3D Automotive ICs

Protection against electrostatic discharge (ESD) events is an extremely important aspect of integrated circuit (IC) design and verification, particularly for 2.5/3D designs targeted for automotive ...
Electronic Design

The ESDA and JEDEC Revise Standards for ESD Testing

JEDEC Solid State Technology Association and the ESD Association today announced the publication of ANSI/ESDA/JEDEC JS-001-2011 for Electrostatic Discharge Sensitivity (ESD) Testing - Human Body Model ...
Semiconductor Engineering

Can We Efficiently Automate 2.5/3D IC ESD Protection Verification?

Protection against ESD events (commonly referred to as ESD robustness) is an extremely important aspect of integrated circuit (IC) design and verification, including 2.5/3D designs. ESD events cause ...