As the cost of chip turns has grown from thousands to millions of dollars, missed design bugs are unacceptable Chip design verification used to be straightforward, if not always easy. Verification ...

With Agile approaches being applied with more or less success to hardware design and verification development processes, the question to apply a continuous integration flow in a hardware development ...

Structured ASICs require developers to re-program only the top level metal layers when customizing their designs, enabling faster development time and low unit cost. However, many structured ASICs ...

It’s no secret that hardware is the new currency in the chip world. It’s no longer the case that the semiconductor industry is in the hands of traditional semiconductor giants; an increasing number of ...

It’s time to put to rest 11 of the most common myths about verification intellectual property (VIP). SmartDV’s Bipul Talukdar, Director of Applications Engineering, explains why it’s used in a ...

This file type includes high resolution graphics and schematics. Design complexity has grown with each successive generation of system-on-chip (SoC) evolution. SoCs now include many industry-standard ...